Intel uses 'strained silicon' to increase chip power

By Michael Kanellos

Intel will increase the performance of its microprocessors next year, in part by spreading out its silicon atoms.

The Santa Clara-based chipmaker will use "strained silicon" - or silicon where the atoms in the chip's silicon base are spaced further apart than normal - in its chips made on the 90-nanometer manufacturing process, according to Mark Bohr, director of process architecture at Intel.

Chips made in this way will also feature new insulating techniques, smaller internal components and other advances. Prescott, the code name of the chip that will succeed the Pentium 4, will be the first 90-nanometer chip and will arrive in the second half of 2003.

"By stretching the silicon, we can make the electrons move faster," inside the chip, he said. "The basic effect has been demonstrated on large transistors, but there were always doubts that you could achieve the benefits on small, high-performance transistors."

Tinkering at the atomic level is becoming a daily issue for chip manufacturers. For decades, chip makers have steadily shrunk the size of transistors and chips by following Moore's Law, which dictates that the number of transistors on a chip doubles every two years.

Moore's Law has worked so well, though, that engineers now find themselves up against the laws of physics.

For an in-depth explanation of how 'strained silicon' works click here: http://www.silicon.com/a55069

Michael Kanellos writes for News.com