To print: Click here or Select File and then Print from your browser's menu

This story was printed from silicon.com, located at http://www.silicon.com/

Story URL: http://hardware.silicon.com/servers/0,39024647,39161828,00.htm

Intel poised to unleash high-end Xeon
Not so petty cache...

By Stephen Shankland

Published: Tuesday 29 August 2006

Intel will introduce its new "Tulsa" Xeon chip for high-end x86 servers today, the latest of several moves to reclaim turf lost to rival AMD.

The new dual-core chip, designed for four-processor systems and officially called the Xeon 7100 series, has a price ranging from $856 for a 7110 model with 4MB of high-speed cache memory and a 2.6GHz clock speed to $1,980 for a 7140 model with 16MB of cache and 3.4GHz speed.

Last week, Intel said Tulsa boosts performance about 70 per cent compared with its predecessor, "Paxville", but now the chipmaker is trying to steer attention toward a comparison with AMD's Opteron. Tulsa systems are 17 per cent faster than Opteron machines on business database tasks and 42 per cent faster on Java server tasks, Intel said.

AMD entered the x86 server market three years ago, and the competition has been fierce since. All four major server makers sell or will sell Opteron servers, and AMD has risen to claim 26 per cent of the server processor market. Intel is fighting back with its "Woodcrest" Xeon for dual-processor servers and now with Tulsa for higher-end models.

Tom Kilroy, general manager of Intel's Digital Enterprise Group, said: "The 7100 really brings us up back to where want to be in terms of maximum performance."

Tulsa is the last model to use Intel's all-but-extinct NetBurst architecture, which Kilroy acknowledged is "long in the tooth". But Tulsa is still a compelling design, he argued. "The 16MB of L3 [level-three] cache really helps position it for superior performance."

Indeed, cache is at the heart of the AMD-Intel rivalry. AMD's Opteron includes a built-in memory controller, while Intel systems require a separate chip that takes longer to fetch data. But including a large cache means that data is more likely to be readily at hand, so the memory controller isn't needed at all, Intel argues.

Intel's 65-nanometer process means more circuitry can be squeezed into a given surface area than with the 90-nanometer process AMD still uses. And even using the same process, Intel cache elements are smaller, said Pat Gelsinger, who co-manages the Digital Enterprise Group with Kilroy.

Gelsinger said in an earlier interview: "My cache cells are about half the size. I got cache to burn."

Tulsa is also the first Xeon to include "Pellston" - officially called Intel Cache Safe Technology, which shuts off cache elements if errors are detected. Such reliability features are important in higher-end servers, Kilroy said.

But cache isn't free. It takes up real estate, increases manufacturing costs and makes a chip run hotter. The top-end Tulsa with 16MB of cache draws 150 watts of power running flat out, though slower models with 4MB cache consume only 95 watts.

AMD was quick to point out the power difference compared with its 95-watt mainstream Opteron chips. John Fruehe, worldwide market development manager for AMD's server products, said: "We don't require customers to choose between high performance and great power savings."

More feistiness is all but guaranteed in the x86 server market, which generated $5.9bn in revenue for computer makers in the second quarter, according to IDC.

Stephen Shankland writes for CNET News.com