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Big Blue to unwrap extra-brainy chips

Packing megabytes more memory...

Tags: chips, ibm

By Tom Krazit

Published: 14 February 2007 08:55 GMT

IBM is set to unveil a new way of putting memory on processors which it thinks will dramatically improve performance.

Starting with its 45-nanometer processors next year, IBM will use embedded DRAM (dynamic RAM) instead of SRAM (static RAM) on its processors, effectively tripling the amount of memory it can put on those chips. The company plans to present the results of its research on using embedded DRAM during today's sessions at the International Solid State Circuits Conference (ISSCC), according to Subu Iyer, distinguished engineer and director of 45-nanometer development at IBM.

Modern processors have cache memory integrated directly onto the chip, adjacent to the processing engine. This allows the chip to store frequently used data very close to the CPU, where it can be accessed much faster than data that resides off the chip in the system memory.

For years, chipmakers have used SRAM on processors but as chips grow smaller, SRAM is having a hard time keeping up, Iyer said. Problems are cropping up with current leakage, and designers would like to use embedded DRAM, which requires fewer transistors and is less leaky.

The problem is that no one, until now, had figured out how to use embedded DRAM with silicon-on-insulator (SOI) technology, Iyer said. IBM uses SOI to reduce current leakage from the transistors it builds for processors such as the Power 5, and had used embedded DRAM in certain chips such as its Blue Gene processors. But the company had yet to marry the two technologies. That breakthrough is what it plans to unveil at ISSCC, he said.

Processors built on IBM's 45-nanometer manufacturing technology will be the first products able to take advantage of the embedded DRAM, Iyer said. Those are expected in 2008. IBM envisions putting anywhere from 24MB to 48MB of on-chip cache memory into those processors, he said. By comparison, the Power 6 chip scheduled to arrive later this year will have 8MB of on-chip cache memory.

IBM has a technology partnership with AMD in which the companies pool research and development resources but AMD declined to comment on whether it was planning to use IBM's embedded DRAM technology in its own products. AMD has conducted its own research into dense cache memory technology called Z-RAM through a partnership with Innovative Silicon.

Intel has also announced plans to move beyond SRAM for future cache memory technology but it is examining a different type of technology called floating-body cells. Intel's Montecito Itanium processor already features 24MB of on-chip cache memory.

Tom Krazit writes for CNET News.com

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